Staff Process Integration Engineers

SanDisk Corporation needs Staff Process Integration Engineers in Milpitas, California to engineer full device-process integration flow in the current sub-15nm node/future technology in 1A, 1B generations/Post 3D NAND cell. Perform new materials research including new IPD, charge trap materials, high-k materials with new device structures and research into build processes using these materials for flash memory. Perform bench measurements, collect and analyze real size cell device data at sub-15nm, fine tuning the parameters setting accordingly in correlation with each of the process interaction to assure high yield and good reliability, endurance. Perform detailed failure analysis from the actual memory device using experimental silicon and experimental splits during research and development period to the manufacture phase. Run device-process simulation, carry out experiments and perform full-loop failure analysis and detailed debugging interactions in circuit, memory cells and interaction between memory cell versus controllers and firmware. Using experimental wafers, analyze measurement data and process root cause and capability as well as devices performance. Perform circuitry debug of each component of the product designs to prevent short fall for new devices. Develop new device structures and run processes splits at our Japan plants for flash memory, including metal gates, thin gate oxide, high-k materials and nano devices.
Employer will accept Masters degree in Electrical Engineering, Electronics Engineering, Physics, Nano-science, Materials Science, Chemistry, Chemical Engineering or related technical field and 3 years of work experience in the job offered or in a process integration engineer-related occupation. Education or experience must include: NAND Flash device physics at the cell level and at the product level; NAND device work on Silicon and TCAD simulation; Semiconductor memory cell operation evaluation using the measurement tools including Magnum, Mosaid System, Agilent 4156C and LCR Meter on Silicon; Peripheral Tr. Evaluation and CMOS Tr. optimization for flash product operation; Flash memory parameters tuning from evaluating DICs, wafer level test TEG, NanoNT tester; Floating Gate NAND 2bpc (MLC) & 3bpc (TLC)device and process evaluation and device characterization; Process work to drive yield/reliability work with development fabrications and manufacture fabrications in Various density of memory device (16Gb, 32Gb, 64Gb, 128Gb); Novel flash product development and research experience such as Charge trap Flash or Metal floating gate; Competitive analysis from memory cell level to product level; 3D-NAND Flash memory development including root cause failure analysis, including electrical testing to solve process and device issues; and NAND Flash device oriented process integration in the research/development environment and in international fabrications manufacture. Must be available to work on projects at various, unanticipated sites throughout the United States and abroad.
To apply, please reference job code #SD234 when mailing resume to:
SanDisk Corporation
951 SanDisk Drive
Milpitas, CA 95035

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