Staff Process Integration Engineers

SanDisk Corporation needs Staff Process Integration Engineers in Milpitas, California to be responsible for device process integration flow for both current Sub-15nm and future technology nodes such as 1A, 1B and beyond in 3D-NAND. Conduct new materials research, new device structures and processes for flash memory, including metal gates, high-k materials, nano devices and build those processes base for actual products. Conduct hands-on bench measurements with TEG tester, and other bench testers probers, collect and analyze real size cell device data at sub-15nm, developing cell accordingly in correlation with each of the process interaction. Carry out specific experiments, take data and analyze processes and devices from experimental wafers. Interface with several engineering departments including wafer foundries. Delve into measurement data, analyzing process root cause and capability, and devices performance from experimental wafers. Conduct bench tests and lead into detail circuitry debug of each component of the product designs to prevent short fall for new devices. Spear head into new device structures and run processes splits at our Japan Fabs for flash memory, including but not limited to metal gates, thin gate oxide, high-k materials, nano devices. Drive process simplification and cost reduction initiatives at the Japan Fabs including working with our counterparts Toshiba during Development stage as well as at the Manufacture Stage. Wafer bench measurements to evaluate effects of process changes to various device performance.
Employer will accept Masters degree in Electrical, Electronics Engineering, Physics, Chemical Engineering or related technical field and 4 year(s) of work experience in job offered or 4 year(s) of work experience in a Process Integration Engineer-related occupation. Education or experience must include:
1. Semiconductor memories device as integration engineer;
2. NAND Flash device including Floating gate device, Hybrid-FG, Planar Cell- at the cell level and at the product level;
3. Semiconductor memory cell operation evaluation TEG testers at the wafer level test TEG;
4. Cell electrical measurement, cell Vt distribution, Data retention measurement, inline CD measurement, and X-SEM analysis;
5. Process and device development;
6. Floating Gate 32nm NAND 2bpc (MLC) device and process, 24nm MLC and 3bpc (TLC) in device characterization and process interaction;
7. Process flow for each of the product densities including 16Gb, 32Gb, and 64Gb NAND Memory;
8. Apply process modules into a CMOS, DRAM and NAND Flash memory and achieving yielding products at critical process modules FEOL, MOL, BEOL by integrating advanced processes;
9. Planar 2D-NAND films structure in process development and proven electrical test on functional NAND cell, NAND string device, and Charge Trap device structures;
10. VLSI fabrication methods to optimize various parameters of NAND flash memory device and characterize the devices for different applications at the Fabs; and
11. Device and Process development, and process cost reduction and implemented during Technology development and during the beginning of Manufacture.
Experience may be gained concurrently. Must be available to work on projects at various, unanticipated sites throughout the United States and abroad.
To apply, please reference job code #SD32 when mailing resume to:
SanDisk Corporation
951 SanDisk Drive
Milpitas, CA 95035

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