Staff ASIC Verification Engineers

SanDisk Corporation needs Staff ASIC Verification Engineers in Milpitas, CA to be responsible for building module level design verification environment and verifying ASIC design using System Verilog and UVM constrained random verification methodology. Responsible for system level verification of high performance enterprise SSD controller. Work closely with the RTL designers, System Architects and Firmware team to develop functional test plan, test bench and test cases, and debug the design issues. Evaluate and enhance test coverage. ASIC chip bring up in the lab.
Employer will accept Bachelors degree in Electrical Engineering or related technical field, followed by 8 years of progressive, post-baccalaureate work experience in job offered or 8 years of progressive, post-baccalaureate work experience in a Verification Engineer-related occupation. Experience must include:
1. 6 years of experience in ASIC Verification;
2. 6 years of experience with high speed interface protocols including PCIe, SAS, and SATA;
3. 6 years of experience in verification languages including System Verilog and C++;
4. 3 years of experience in using System Verilog, C++ and UVM methodology;
5. 3 years of experience in System Verilog assertions and coverage analysis;
6. 3 years of experience in Verification IPs;
7. 1 years of experience in SSD controller;
8. 1 year of experience in Constrained random verification methodology;
9. Scripting language including PERL and TCL; and
10. EDA tools including Synopsys and VCS.
To apply, please reference job code #SD588 when mailing resume to:
SanDisk Corporation
951 SanDisk Drive
Milpitas, CA 95035

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